1. Field of the Invention
This invention relates to a shift arithmetic device in which N-bit information is shifted by a specified number of bits and logic "0" or "1" is set at specified bit positions.
2. Description of the Prior Art
A shift arithmetic device is employed for data processing using some bits of N-bit information or inserting bits of N-bit information in another N-bit information at some bit positions. Conventionally, such a shift arithmetic device comprises a circulating shifter comprising logic gate circuits and a set circuit part for setting logic "0" or "1" in N-bit information shifted by the circulating shifter. The set circuit part is provided with logic gate circuits for forming a set pattern having N bits of logic "0" and "1"; in the prior art, however, an increase in N of the N-bit information, that is, the number of bits used, introduces much complexity in the construction of the set circuit and requires a larger amount of hardware. Thus, the set circuit part becomes very expensive.